Memory devices have been widely used in various electrical products. Memory devices typically include a plurality of word lines, bit lines and memory cells coupled to the word lines and bit lines. When a word line is selected, memory cells coupled to the selected word line are accessed. Generally, the selection for the word lines can be done through decoding address information by a row decoder.
To improve memory performance, memory devices may employ shared row decoders. With the shared row decoder, two or more cell arrays in a memory device can be individually operated at the same time, such as read while read or read while write. However, conventional shared row decoders need a large number of address lines for individually operating all cell arrays, which occupy large circuit area and line routing.